.png){kind=icon}
.png){kind=icon}
Return
Second-Order VCO-ADC Architecture With Low-Area and High Dynamic Range Using Internal Binary Encoding
.png){kind=icon}
PRE
AI
DOI：10.1109/TCSI.2024.3524393.png)
.png){kind=icon}
Original request for help.png){kind=icon}
Share.png){kind=icon}
Save
Abstract
En 中文
One of the limitations of conventional VCO-ADCs is the restriction to first-order noise shaping. True VCO-ADC architectures have been proposed to increase the noise-shaping order by cascading several VCO integrators, but without requiring analog feedback loops. A high noise-shaping order allows to reduce the input VCO frequency compared to a conventional VCO-ADC with similar dynamic range, which improves power consumption. Prior-art True VCO-ADC architectures represent state variables either with a unity-weighted code or with a single-bit. Unity-weighted encoding is a natural choice when ring oscillators are selected as loop filter integrators. However, chip area restrictions force unity-weighted state variables to have few levels. A reduced number of levels in the state variables limits the dynamic range of True VCO-ADCs. In this paper, we experimentally demonstrate a second-order audio VCO-based ADC that uses ring oscillators as integrators but employs Gray and binary encoded state variables. As a consequence, the complexity and area of the True VCO-ADC architecture is reduced, breaking the barrier that limits the dynamic range of prior designs. The proof-of-concept chip shows a dynamic range of 103 dB achieving a peak SNDR of 76.5 dB-A with a power of 250 mu W occupying 0.095 mm(2) in 130 nm CMOS.
Keywords:
Voltage-controlled oscillators
Modulation
Oscillators
Noise
Impedance
Encoding
Ring oscillators
Noise shaping
Linearity
Frequency modulation
VCO-based ADC
data converter
audio ADC
delta-sigma modulation
Journal
IF:
5.2
Papers:
9.7K
Citations:
2.2W