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Self-Synchronized Grid Impedance Estimation Unit Using Interpolated DFT Technique

delete2024-04-01
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OA
AI
J
Jules Macé *
A
Andrea Cervone
D
Dražen Dujić
DOI:10.1109/TPEL.2023.3342317delete
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Abstract

Abstract

En 中文
Estimating the impedance of a grid-connected device or of a grid at the point of common coupling is important for evaluating the interaction between them. Impedance measurement involves a perturbation injection device, which perturbs the system, and a measurement device (impedance estimation unit), which acquires the grid voltages and currents to extract the impedance. When evaluating the grid impedance in the $dq$ reference frame, the reference frame transformation requires estimating the grid angle. For a self-synchronized impedance estimation unit, angle estimation is typically performed by a phase-locked loop, but the presence of low-frequency voltage perturbations limits the accuracy of the results. This article proposes a method with a new approach, based on an interpolated discrete Fourier transform technique, to extract the grid angle. Conventional phase-locked loop and proposed interpolated-discrete-Fourier-transform-based techniques are compared experimentally and the proposed technique shows more accurate impedance estimation in the low frequency range, for comparable frequency tracking performance.
Keywords:
Grid impedance estimation (IE)
interpolated discrete Fourier transform (IpDFT)
perturbation injection (PI)
phase-locked loop (PLL)

Journal

IEEE Transactions on Power Electronics cover
IEEE Transactions on Power Electronics
IF:
6.5
Papers:
1.7W
Citations:
8.3W

Organization

S
swiss federal institutes of technology domain
Scholars:
9.0W
Papers: 8.0W
Citations: 163