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Simplifying Many-Core-Based Heterogeneous SoC Programming With Offload Directives
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DOI：10.1109/TII.2015.2449994.png)
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Abstract
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Multiprocessor systems-on-chip (MPSoC) are evolving into heterogeneous architectures based on one host processor plus many-core accelerators. While heterogeneous SoCs promise higher performance/watt, they are programmed at the cost of major code rewrites with low-level programming abstractions (e.g, OpenCL). We present a programming model based on OpenMP, with additional directives to program the accelerator from a single host program. As a test case, we evaluate an implementation of this programming model for the STMicroelectronics STHORM development board. We obtain near-ideal throughput for most benchmarks, very close performance to hand-optimized OpenCL codes at a significantly lower programming complexity, and up to 30x speedup versus host execution time.
Keywords:
Heterogeneous systems-on-chip (SoC)
many core
nonuniform memory access (NUMA)
OpenMP
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