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Statistical Performance Analysis Framework for Bundled-Data Asynchronous Circuits With Dynamic Voltage Scaling
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DOI：10.1049/cdt2/1529127.png)
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Abstract
En 中文
As the demand for low-power electronic products grows, asynchronous circuits are considered a good alternative for addressing power consumption issues. Applying dynamic voltage scaling (DVS) in asynchronous circuits can further improve their power efficiency. However, asynchronous circuits face challenges, such as performance analysis considering voltage, temperature, and process variations. This paper proposes a new statistical performance analysis model for asynchronous pipelines. This model can be applied to two different styles of asynchronous circuits. The results show that this model has reasonable accuracy on estimated mean delay (2% error on average) compared to detailed analysis carried out with low-level Monte Carlo (MC) circuit simulations.
Keywords:
asynchronous circuit
DVS
performance analysis model
statistical constraints
verification
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IF:
0.8
Papers:
14
Citations:
278