TDTA: Topology-Based Real-Time DAG Task Allocation on Identical Multiprocessor Platforms

Yulong Wu

doi:10.1109/TPDS.2023.3310294

TDTA: Topology-Based Real-Time DAG Task Allocation on Identical Multiprocessor Platforms

2023-11-01

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DOI：10.1109/TPDS.2023.3310294

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Modern real-time systems contain complex workloads, which are usually modeled as directed acyclic graph (DAG) tasks and deployed on multiprocessor platforms. The complex execution logic of DAG tasks results in excessive schedulability analysis overhead, and the current DAG task allocation strategy cannot efficiently utilize processor resources (inner parallelization of DAG tasks). In this article, an invalid-edge deletion (IED) method is proposed to reduce the execution complexity of the DAG tasks while guaranteeing the correctness of the execution logic. Besides, we bound the number of complete paths for DAG tasks, which re-limits the searching space of the schedulability analysis. Then, a topology-based DAG tasks allocation (TDTA) strategy is developed, which reduces the interference caused by higher-priority DAG tasks to enable the full utilization of the processor resources. The experimental results show that the IED method effectively reduces the overhead of DAG task analysis, and the performance of the TDTA strategy is better than the performance of other state-of-the-art strategies.

Keywords:

Task analysis

Resource management

Processor scheduling

Job shop scheduling

Real-time systems

Vehicle dynamics

Topology

Real-time system

directed acyclic graph task

tasks allocation strategy

partitioned scheduling

fixed-priority

TDTA: Topology-Based Real-Time DAG Task Allocation on Identical Multiprocessor Platforms

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