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The Planar Core-Shell Junctionless MOSFET

delete2025-03-31
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OA
AI
C
Cunhua Dou
W
Weijia Song
Y
Yan, Yu
X
Xuan Zhang
Z
Zhiyu Tang
X
Xing Zhao
F
Fanyu Liu
S
Shujian Xue
H
Huabin Sun
J
Jing Wan
B
Binhong Li
Y
Yun Wang
T
Tianchun Ye
徐勇 (Yong Xu)
S
S. Cristoloveanu *
DOI:10.3390/mi16040418delete
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Abstract

Abstract

En 中文
The core-shell junctionless MOSFET (CS-JL FET) meets the process requirements of FD-SOI technology. The transistor body comprises a heavily doped ultrathin layer (core linking the source and the drain), located underneath an undoped layer (shell). Drain current, transconductance, and capacitance characteristics demonstrate striking performance improvement compared with conventional junctionless MOSFETs. The addition of the shell results in one order of magnitude higher mobility (peak value), transconductance, and drive current. The doping and thickness of the core can be engineered to achieve a positive threshold voltage for normally-off operation. The CS-JL FET is compatible with back-biasing and downscaling schemes. The physical mechanisms are revealed by emphasizing the roles of the main device parameters.
Keywords:
junctionless
core-shell
mobility
FD-SOI
miniaturization
planar MOSFET

Journal

Micromachines cover
Micromachines
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3
Papers:
1.4W
Citations:
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G
N
Nanjing University of Posts and Telecommunications
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2.4K
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C
chinese acad sci
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Citations: 4.6K
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