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Threshold learning algorithm for memristive neural network with binary switching behavior
DOI:10.1016/j.neunet.2024.106355.png)
Abstract
En 中文
On-chip learning is an effective method for adjusting artificial neural networks in neuromorphic computing systems by considering hardware intrinsic properties. However, it faces challenges due to hardware non-idealities, such as the nonlinearity of potentiation and depression and limitations on fine weight adjustment. In this study, we propose a threshold learning algorithm for a variation-tolerant ternary neural network in a memristor crossbar array. This algorithm utilizes two tightly separated resistance states in memristive devices to represent weight values. The high-resistance state (HRS) and low-resistance state (LRS) defined as read current of <0.1 mu A and > 1 mu A, respectively, were successfully programmed in a 32 x 32 crossbar array, and exhibited half-normal distributions due to the programming method. To validate our approach experimentally, a 64 x 10 single-layer fully connected network were trained in the fabricated crossbar for an 8 x 8 MNIST dataset using the threshold learning algorithm, where the weight value is updated when a gradient determined by backpropagation exceeds a threshold value. Thanks to the large margin between the two states of the memristor, we observed only a 0.42 % drop in classification accuracy compared to the baseline network results. The threshold learning algorithm is expected to alleviate the programming burden and be utilized in variation-tolerant neuromorphic architectures.
Keywords:
Neuromorphic system
Memristor crossbar array
Ternary neural network
Threshold learning algorithm
Journal
IF:
6.3
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7.7K
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3.0W

