Time-Based Sensing With Linear Current-to-Time Conversion for Multi-Level Resistive Memory

Byung-Kwon An

doi:10.1109/TCSI.2025.3597268

Time-Based Sensing With Linear Current-to-Time Conversion for Multi-Level Resistive Memory

2025-08-21

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DOI：10.1109/TCSI.2025.3597268

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Resistive Random Access Memory (RRAM) is a promising low-power memory candidate because of a large R-ratio (R_HRS/R_LRS). Multi-level RRAM cells have been investigated to improve memory density and cost-per-bit. However, sensing multi-level becomes challenging due to the smaller R-ratios between stored digital values. This paper introduces a novel time-based sensing (TBS) scheme for enhancing the sensing speed and robustness for single-level cells (SLC) to multi-level cells (MLC). The proposed time-based sensing scheme converts the bit line (BL) current into a time delay using a novel current-to-time converter (CTC). The BL-current-dependent time delays are utilized to generate digital data. In addition, the proposed sensing scheme executes sensing without need for reference current or reference voltage. Comprehensive simulation in 40nm CMOS technology shows that the proposed TBS scheme achieves better linearity and higher read speed by precise cell current replication in CTC compared to the prior TBS schemes. As a result, the proposed TBS reduces sensing latency by 230%~340% compared to the prior TBS schemes. Furthermore, the proposed TBS improves the variation tolerance of read operation by 5%~33% at 1.1 V.

Keywords:

Resistive random access memory (RRAM)

time-based sensing (TBS)

multi-level cell (MLC)

current-to-time converter (CTC)

Time-Based Sensing With Linear Current-to-Time Conversion for Multi-Level Resistive Memory

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