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Timestep-Parallel 4D Neuromorphic Computing Array Enabling High Computing Power Density and High Energy Efficiency

delete2025-10-01
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PRE
AI
P
Pujun Zhou
C
C.H. Xiao
M
Meng, Liwei
Q
Qi Yu
宁
宁宁 (Ning Ning)
Y
Yang Liu
S
S. G. Hu
G
Guanchao Qiao *
DOI:10.1109/TCSII.2025.3603624delete
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Abstract

Abstract

En 中文
The timestep-based inference process of spiking neural networks (SNNs) presents two challenges for neuromorphic chip design: 1) additional storage overhead for membrane potentials, and 2) significant power consumption resulting from repeated access to computational data. To address this challenge, this work proposes a timestep-parallel 4D neuromorphic computing array of size $N_{T}\times N_{Z}\times N_{X}\times N_{Y}$ , simultaneously enabling parallel computing in temporal and spatial dimensions. The $N_{T}$ dimension supports timestep-parallel computing, the $N_{Z}$ dimension supports neuron-parallel computing, and the $N_{X}$ and $N_{Y}$ dimensions are used for synapse-parallel computing. The architecture facilitates flexible data reuse across different dimensions (with weights reuse along different timesteps and spikes reuse along different neurons), significantly reducing storage access. Meanwhile, it treats the membrane potential as a short-term computational variable that can be stored in a small buffer, thereby eliminating large-scale membrane potential storage overhead and access. The reduction in data access and storage costs is beneficial for lowering system power consumption and enhancing synaptic energy efficiency. Ultimately, the architecture is evaluated using a 28 nm process library and demonstrates a high computing power density of 1160 GSOP/s/mm2 and a high synaptic energy efficiency of 0.36 pJ/SOP, surpassing related state-of-the-art works. This work significantly reduces the hardware cost of neuromorphic computing and is expected to enhance the competitiveness of neuromorphic hardware in contemporary artificial intelligence applications.
Keywords:
Neurons
Computer architecture
Arrays
Artificial intelligence
Neuromorphic engineering
Three-dimensional displays
Synapses
Hardware
Voltage control
Energy efficiency
Artificial intelligence (AI)
neuromorphic computing
parallel computing
spiking neural network (SNN)

Journal

I
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
IF:
4.9
Papers:
142
Citations:
0

Organization

No organization information available
Cited Papers

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