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Toward Unified Standards for Open RTL-to-GDSII Design Flows: Insights From the Open RTL-to-GDSII Flow Standards Workshop (ORFSW 2025) [Standards Corner]
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DOI:10.1109/MCAS.2025.3641872.png)
Abstract
En 中文
The rapid expansion of open-source Electronic Design Automation (EDA) has created unprecedented opportunities for accessible, transparent, and collaborative chip design. However, the growing diversity of tools, data formats, and methodologies has also highlighted the urgent need for unified standards that ensure interoperability, scalability, and reproducibility across the complete RTL-to-GDSII design flow. The Open RTL-to-GDSII Flow Standards Workshop (ORFSW 2025) brings together academic researchers, industry leaders, open-source developers, and standards experts to explore emerging challenges and opportunities in establishing a cohesive framework for open silicon development. This workshop provides a platform for discussing standardization gaps in RTL design, synthesis, floorplanning, placement, and routing, timing closure, physical verification, and sign-off. Through invited talks, panel discussions, and community-driven dialogue, ORFSW 2025 aims to accelerate the creation of practical, consensus-based standards that enable reliable design portability, enhance toolchain interoperability, and support the long-term sustainability of the open hardware ecosystem. By fostering cross-domain collaboration, the workshop seeks to strengthen the global movement toward democratized chip design and further advance the IEEE CASS Standards Activities Subdivision’s mission to shape the future of open-source EDA and semiconductor innovation.
Keywords:
IEEE CASS SASD
open source EDA
RTL to GDSII
design flow standardization
interoperability
chip design automation
physical design
open hardware
semiconductor design standards
Journal
IF:
3.5
Papers:
525
Citations:
1.3K

