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Two Reliability-Based Iterative Majority-Logic Decoding Algorithms for LDPC Codes
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DOI：10.1109/TCOMM.2009.12.080493.png)
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Abstract
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This paper presents two novel reliability-based iterative majority-logic decoding algorithms for LDPC codes. Both algorithms are binary message-passing algorithms and require only logical operations and integer additions. Consequently, they can be implemented with simple combinational logic circuits. They either outperform or perform just as well as the existing weighted bit-flipping or other reliability-based iterative decoding algorithms for LDPC codes in error performance with a faster rate of decoding convergence and less decoding complexity. Compared to the sum-product algorithm for LDPC codes, they offer effective trade-offs between performance and decoding complexity.
Keywords:
Row-column constraint
orthogonal check-sums
majority-logic decoding
binary message passing
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8.3
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1.2W
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3.6W
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