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Virtual Page-Based Flash Translation Layer for Compressed Solid-State Drives
DOI:10.1049/ell2.70605.png)
Abstract
En 中文
Data compression built into solid-state drives (SSDs) has emerged as an effective technique to reduce write amplification and improve storage utilisation. Nevertheless, compression introduces variable-length data, which invalidates the 1-to-1 mapping between logical and physical pages in the flash translation layer (FTL). The proposed virtual page-based FTL (VPFTL) addresses challenges of asymmetric mappings caused by compression. By grouping multiple physically related pages into a single virtual page, VPFTL enables flexible management of logical-to-physical (L2P) and physical-to-logical (P2L) address mappings. Experimental results demonstrate that VPFTL significantly improves NAND flash storage utilisation, achieving up to 1.44 & times; higher than N-to-1 mapping schemes. VPFTL maintains comparable read/write performance, indicating its effectiveness and scalability for compressed SSD controllers that integrate hardware compression and emerging error-correction codes (ECCs).
Keywords:
data compression
flash memories
flash translation layer
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