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S
Shelly Garg
Indraprastha Institute of Information Technology Delhi
13
H-index
46
Paper Count
621
Citation Count
0
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2
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Implementing Logic Functions Using Independently-Controlled Gate in Double-Gate Tunnel FETs: Investigation and Analysis
IEEE ACCESS
IF
3.6
2019-01-01
18
OA
AI
Garg, Shelly; Saurabh, Sneh
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Suppression of ambipolar current in tunnel FETs using drain-pocket: Proposal and analysis
SUPERLATTICES AND MICROSTRUCTURES
IF
3.3
2018-01-01
71
PRE
AI
Garg, Shelly; Saurabh, Sneh
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S
Sneh Saurabh
H-index: 14 · Papers: 86
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