Canyam
AI summaries for academic research
Home
Literature Help
Subscribe
Favorites
Tools
Analysis
Summary
Patents
Not logged in
Back
J
Jiafeng Xie
Villanova University
20
H-index
91
Paper Count
1.0K
Citation Count
0
Related Insights
Subscribe
Published Papers
20
Publication Date
Publication Date
Impact Factor
Citations
ISCAS Guest Editorial Special Issue Based on the 2025 IEEE International Symposium on Circuits and Systems
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF
5.2
2025-12-01
0
PRE
AI
Xie, Jiafeng; Du, Yuan; Zhang, Xinmiao
Share
Save
EMINEM: Efficient FPGA Implementation of Mixed-RadIx NTT Hardware AccElerators for NIST Post-QuantuM Cryptography FALCON, Dilithium, and HAWK
ACM Transactions on Reconfigurable Technology and Systems
IF
2.8
2025-12-01
1
PRE
AI
Tu, Yazheng; Xie, Jiafeng
Share
Save
CHIRP:
C
ompact and
H
igh-Performance FPGA Implementation of Un
i
fied Hardware Accelerators for
R
ing-Binary-LWE-based
P
QC
ACM Transactions on Reconfigurable Technology and Systems
IF
2.8
2025-01-28
0
PRE
AI
Tianyou Bao; Pengzhou He; Daisuke Fujimoto; Yuichi Hayashi; Jiafeng Xie
Share
Save
LTE: Lightweight and Timing-Efficient Unequal-Sized Polynomial Multiplication Accelerators
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
IF
4.9
2025-01-01
0
PRE
AI
Tu, Yazheng; Bao, Tianyou; He, Pengzhou; Sousa, Leonel; Xie, Jiafeng
Share
Save
HSPA: High-Throughput Sparse Polynomial Multiplication for Code-based Post-Quantum Cryptography
ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS
IF
2.6
2024-12-10
0
PRE
AI
He, PZ; Tu, YZ; Bao, TY; Koc, CC; Xie, JF
Share
Save
AEKA: FPGA Implementation of Area-Efficient Karatsuba Accelerator for Ring-Binary-LWE-Based Lightweight PQC
ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS
IF
2.8
2024-04-30
0
OA
AI
Bao, Tianyou; He, Pengzhou; Xie, Jiafeng; Jacinto, H. S.
Share
Save
Hardware Circuits and Systems Design for Post-Quantum Cryptography-A Tutorial Brief
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
IF
4.9
2024-03-01
8
OA
AI
Xie, Jiafeng; Zhao, Wenfeng; Lee, Hanho; Roy, Debapriya Basu; Zhang, Xinmiao
Share
Save
FPGA Implementation of Compact Hardware Accelerators for Ring-Binary-LWE-based Post-quantum Cryptography
ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS
IF
2.8
2023-06-21
6
OA
AI
He, Pengzhou; Bao, Tianyou; Xie, Jiafeng; Amin, Moeness
Share
Save
Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF
5.2
2022-08-01
17
OA
AI
Imana, Jose L.; He, Pengzhou; Bao, Tianyou; Tu, Yazheng; Xie, Jiafeng
Share
Save
Efficient Hardware Implementation of Large Field-Size Elliptic Curve Cryptographic Processor
IEEE ACCESS
IF
3.6
2022-01-01
10
OA
AI
Lee, Chiou-Yng; Zeghid, Medien; Sghaier, Anissa; Ahmed, Hassan Yousif; Xie, Jiafeng
Share
Save
Novel Low-Complexity Polynomial Multiplication Over Hybrid Fields for Efficient Implementation of Binary Ring-LWE Post-Quantum Cryptography
IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS
IF
3.8
2021-06-01
17
PRE
AI
He, Pengzhou; Guin, Ujjwal; Xie, Jiafeng
Share
Save
Efficient Hardware Implementation of Finite Field Arithmetic AB plus C for Binary Ring-LWE Based Post-Quantum Cryptography
IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING
IF
5.4
2021-01-01
14
OA
AI
Xie, Jiafeng; He, Pengzhou; Wang, Xiaofang Maggie; Imana, Jose L.
Share
Save
Digit-Serial Versatile Multiplier Based on a Novel Block Recombination of the Modified Overlap-Free Karatsuba Algorithm
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF
5.2
2019-01-01
16
PRE
AI
Lee, Chiou-Yng; Xie, Jiafeng
Share
Save
Low Complexity Implementation of Unified Systolic Multipliers for NIST Pentanomials and Trinomials Over GF(2m)
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF
5.2
2018-08-01
2
PRE
AI
Shao, Qiliang; Hu, Zhenji; Basha, Shaik Nazeem; Zhang, Zhiping; Wu, Zhiqiang; Lee, Chiou-Yng; Xie, Jiafeng
Share
Save
Efficient Implementation of Karatsuba Algorithm Based Three-Operand Multiplication Over Binary Extension Field
IEEE ACCESS
IF
3.6
2018-01-01
5
OA
AI
Lee, Chiou-Yng; Fan, Chia-Chen; Xie, Jiafeng; Yuan, Shyan-Ming
Share
Save
Efficient FPGA Implementation of Low-Complexity Systolic Karatsuba Multiplier Over G F (2m) Based on NIST Polynomials
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF
5.2
2017-07-01
27
OA
AI
Xie, Jiafeng; Meher, Pramod Kumar; Sun, Mingui; Li, Yuecheng; Zeng, Bo; Mao, Zhi-Hong
Share
Save
High-Throughput Digit-Level Systolic Multiplier Over GF(2m) Based on Irreducible Trinomials
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
IF
4.9
2015-05-01
5
PRE
AI
Xie, Jiafeng; Meher, Pramod Kumar; Mao, Zhi-Hong
Share
Save
Low-Latency High-Throughput Systolic Multipliers Over GF(2m) for NIST Recommended Pentanomials
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF
5.2
2015-03-01
23
PRE
AI
Xie, Jiafeng; Meher, Pramod Kumar; Mao, Zhi-Hong
Share
Save
High-Throughput Finite Field Multipliers Using Redundant Basis for FPGA and ASIC Implementations
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF
5.2
2015-01-01
14
PRE
AI
Xie, Jiafeng; Meher, Pramod Kumar; Mao, Zhi-Hong
Share
Save
Hardware-Efficient Realization of Prime-Length DCT Based on Distributed Arithmetic
IEEE TRANSACTIONS ON COMPUTERS
IF
3.8
2013-06-01
26
PRE
AI
Xie, Jiafeng; Meher, Pramod Kumar; He, Jianjun
Share
Save
Research Directions
The data has not been retrieved yet.
Co-authors
Cooperation Journals
M
Moeness G. Amin
H-index: 77 · Papers: 939
M
Mingui Sun
H-index: 42 · Papers: 439
P
Pramod Kumar Meher
H-index: 41 · Papers: 321
L
Leonel Sousa
H-index: 39 · Papers: 465
张
张智平
(Zhiping Zhang)
H-index: 38 · Papers: 313
View more
.png){kind=icon}
Not logged in.png){kind=icon}
Not logged in.png){kind=icon}
.png){kind=icon}
.png){kind=icon}
.png){kind=icon}
