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Joel Emer

massachusetts institute of technology

66H-index
291Paper Count
2.6WCitation Count
Published Papers 11
Publication Date
The Continuous Tensor Abstraction: Where Indices Are Real
err2025-10-01
err0
PREAI
errWon, Jaeyeon; Ahrens, Willow; Collin, Teodoro Fields; Emer, Joel S.; Amarasinghe, Saman
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Onyx: A 12-nm Programmable Accelerator for Dense and Sparse Applications
err2025-09-04
err0
PREAI
errKalhan Koul; Olivia Hsu; Yuchen Mei; Sai Gautham Ravipati; Maxwell Strange; Jackson Melchert; Alex Carsello; Taeyoung Kong; Po-Han Chen; Huifeng Ke; Keyi Zhang; Qiaoyi Liu; Gedeon Nyengele; Zhouhua Xie; Akhilesh Balasingam; Jayashree Adivarahan; Ritvik Sharma; Christopher Torng; Joel S. Emer; Fredrik Kjolstad; Mark Horowitz; Priyanka Raina
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Secure Machine Learning Hardware: Challenges and Progress
err2025-01-01
err0
PREAI
errLee, Kyungmi; Ashok, Maitreyi; Maji, Saurav; Agrawal, Rashmi; Joshi, Ajay; Yan, Mengjia; Emer, Joel S.; Chandrakasan, Anantha P.
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Simba: Scaling Deep-Learning Inference with Chiplet-Based Architecture
err2021-05-24
err10
errOAAI
errShao, Yakun Sophia; Cemons, Jason; Venkatesan, Rangharajan; Zimmer, Brian; Fojtik, Matthew; Jiang, Nan; Keller, Ben; Klinefelter, Alicia; Pinckney, Nathaniel; Raina, Priyanka; Tell, Stephen G.; Zhang, Yanqing; Dally, William J.; Emer, Joel; Gray, C. Thomas; Khailany, Brucek; Keckler, Stephen W.
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Freely scalable and reconfigurable optical hardware for deep learning
err2021-02-04
err51
errOAAI
errBernstein, Liane; Sludds, Alexander; Hamerly, Ryan; Sze, Vivienne; Emer, Joel; Englund, Dirk
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Efficient Processing of Deep Neural Networks: A Tutorial and Survey
err2017-12-01
err2.6K
errOAAI
errSze, Vivienne; Chen, Yu-Hsin; Yang, Tien-Ju; Emer, Joel S.
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(FPL 2015) Scavenger: Automating the Construction of Application-Optimized Memory Hierarchies
err2017-03-22
err1
PREAI
errYang, Hsin-Jung; Fleming, Kermin; Winterstein, Felix; Adler, Michael; Emer, Joel
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CLARA: Circular Linked-List Auto and Self Refresh Architecture
err2016-10-03
err2
PREAI
errAgrawal, Aditya; O'Connor, Mike; Bolotin, Evgeny; Chatterjee, Niladrish; Emer, Joel; Keckler, Stephen
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A-Port Networks: Preserving the Timed Behavior of Synchronous Systems for Modeling on FPGAs
err2009-09-01
err16
PREAI
errPellauer, Michael; Vijayaraghavan, Muralidaran; Adler, Michael; Arvind; Emer, Joel
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From TeAAL to FuseMax: Separation of Concerns for Attention Accelerator Design
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PREAI
errNandeeka Nayak; Toluwanimi O. Odemuyiwa; Xinrui Wu; Michael Pellauer; Joel S. Emer; Christopher W. Fletcher
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