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P
Pallabi Sarkar
Toronto Metropolitan University
5
H-index
42
Paper Count
104
Citation Count
0
Related Insights
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Published Papers
4
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Publication Date
Impact Factor
Citations
Signature-Free Watermark for Protecting Digital Signal Processing Cores Used in CE Devices
IEEE CONSUMER ELECTRONICS MAGAZINE
IF
4.1
2019-01-01
4
PRE
AI
Sarkar, Pallabi; Roy, Dipanjan; Sengupta, Anirban; Naskar, Mrinal Kanti
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Optimizing DSP Cores Using Design Transformation
IEEE CONSUMER ELECTRONICS MAGAZINE
IF
4.1
2018-07-01
1
PRE
AI
Roy, Dipanjan; Sarkar, Pallabi; Sengupta, Anirban; Naskar, Mrinal Kanti
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Designing Low-Cost Hardware Accelerators for CE Devices
IEEE CONSUMER ELECTRONICS MAGAZINE
IF
4.1
2017-10-01
3
PRE
AI
Sarkar, Pallabi; Sengupta, Anirban; Rathlavat, Santosh; Naskar, Mrinal Kanti
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A multi structure genetic algorithm for integrated design space exploration of scheduling and allocation in high level synthesis for DSP kernels
SWARM AND EVOLUTIONARY COMPUTATION
IF
8.5
2012-12-01
25
PRE
AI
Sengupta, Anirban; Sedaghat, Reza; Sarkar, Pallabi
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Co-authors
Cooperation Journals
R
Reza Sedaghat
H-index: 24 · Papers: 191
A
Anirban Sengupta
H-index: 23 · Papers: 291
M
Mrinal Kanti Naskar
H-index: 18 · Papers: 239
D
Dipanjan Roy
H-index: 8 · Papers: 47
S
Santosh Rathlavat
H-index: 1 · Papers: 3
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