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Mauro Olivieri

sapienza university rome

22H-index
195Paper Count
1.8KCitation Count
Published Papers 20
Publication Date
Eight-Bit Vector SoftFloat Extension for the RISC-V Spike Simulator
err2026-03-03
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errOAAI
errAndrea Marcelli; Abdallah Cheikh; Marcello Barbirotta; Antonio Mastrandrea; Francesco Menichelli; Mauro Olivieri
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Configurable Hardware Acceleration for Hyperdimensional Computing Extension on RISC-V
err2026-02-01
err1
PREAI
errMartino, Rocco; Angioli, Marco; Rosato, Antonello; Barbirotta, Marcello; Cheikh, Abdallah; Olivieri, Mauro
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Fault tolerant voting circuits: A Dual-Modular-Redundancy approach for Single-Event-Transient mitigation
err2025-10-01
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errOAAI
errBarbirotta, Marcello; Angioli, Marco; Mastrandrea, Antonio; Menichelli, Francesco; Pisani, Marco; Olivieri, Mauro
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Efficient Implementation of LinearUCB through Algorithmic Improvements and Vector Computing Acceleration for Embedded Learning Systems
err2025-07-11
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errOAAI
errMarco Angioli; Marcello Barbirotta; Abdallah Cheikh; Antonio Mastrandrea; Francesco Menichelli; Mauro Olivieri
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Design, Implementation and Evaluation of a New Variable Latency Integer Division Scheme
err2024-07-01
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errOAAI
errAngioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Jamili, Saeid; Olivieri, Mauro
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A RISC-V Fault-Tolerant Soft-Processor Based on Full/Partial Heterogeneous Dual-Core Protection
err2024-01-01
err1
errOAAI
errVigli, Francesco; Barbirotta, Marcello; Cheikh, Abdallah; Menichelli, Francesco; Mastrandrea, Antonio; Olivieri, Mauro
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Dynamic Triple Modular Redundancy in Interleaved Hardware Threads: An Alternative Solution to Lockstep Multi-Cores for Fault-Tolerant Systems
err2024-01-01
err2
errOAAI
errBarbirotta, Marcello; Menichelli, Francesco; Cheikh, Abdallah; Mastrandrea, Antonio; Angioli, Marco; Olivieri, Mauro
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Enhancing Fault Tolerance in High-Performance Computing: A Real Hardware Case Study on a RISC-V Vector Processing Unit
err2024-01-01
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errOAAI
errBarbirotta, Marcello; Minervini, Francesco; Morales, Carlos Rojas; Cristal, Adrian; Unsal, Osman; Olivieri, Mauro
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Design and Evaluation of Buffered Triple Modular Redundancy in Interleaved-Multi-Threading Processors
err2022-01-01
err11
errOAAI
errBarbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro
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A low-voltage class-AB OTA exploiting adaptive biasing
err2020-07-01
err7
errOAAI
errCenturelli, Francesco; Fava, Alessandro; Olivieri, Mauro; Tommasino, Pasquale; Trifiletti, Alessandro
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High-level side-channel attack modeling and simulation for security-critical systems on chips
err2008-07-01
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PREAI
errMenichelli, Francesco; Menicocci, Renato; Olivieri, Mauro; Trifiletti, Alessandro
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Statistical carry lookahead adders
err1996-03-01
err30
PREAI
errDeGloria, A; Olivieri, M
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Hardware design of asynchronous fuzzy controllers
err1996-01-01
err8
PREAI
errCosta, A; DeGloria, A; Olivieri, M
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