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J

Jean‐Pierre David

department of electrical engineering
H-index:22
Citation Count:3,987
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Enabling Rank-Based P4 Programmable Schedulers: Requirements, Implementation, and Evaluation on BMv2 Switches
2025-02-010
PRE
P4Muse: Enabling Modular P4 Programming via Compiler-Managed Code Merging Without Syntax Modifications

P4Muse:通过编译器管理的代码合并(无需语法修改)实现模块化P4编程

2025-01-010
OA
Polara-Keras2c: Supporting Vectorized AI Models on RISC-V Edge Devices
2024-01-010
OA
A Hardware Architecture of a Dynamic Ranking Packet Scheduler for Programmable Network Devices

用于可编程网络设备的动态排名分组调度器的硬件体系结构

2023-01-012
OA
Generic Wireless Power Transfer and Data Communication System Based on a Novel Modulation Technique
2020-11-0137
PREAI
Automated Synthesis of Streaming Transfer Level Hardware Designs

流传输级硬件设计的自动综合

2018-11-094
PREAI
A Hybrid Architecture With Low Latency Interfaces Enabling Dynamic Cache Management
2018-01-010
OAAI
Fast description and synthesis of control-dominant circuits
2014-05-015
PREAI
Logarithmic-Time FPGA Bitstream Analysis: A Step Towards JIT Hardware Compilation

对数时间FPGA比特流分析: 迈向JIT硬件编译的一步

2011-05-012
PREAI
Gamma ray degradation of electrolytes containing alkylcarbonate solvents and a lithium salt
2010-01-0110
PREAI
Hardware complexity of modular multiplication and exponentiation
2007-10-0127
PREAI