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J
Julio Villalba
university of malaga
17
H指数
66
论文数
937
被引数
0
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14
发表时间
发表时间
IF
被引数
An SEU-Tolerant Cache for a RISC-V Core
适用于RISC-V核心的SEU容错缓存
Computers
IF
4.2
2026-07-23
0
OA
AI
Ariel David Santana Gil; Salvador Ibarra Delgado; Julio Villalba Moreno; Remberto Sandoval Arechiga; Viktor Iván Rodriguez Abdalá; Manuel Hernández Calviño
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Fast HUB Floating-Point Adder for FPGA
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
IF
4.9
2019-06-01
2
OA
AI
Villalba, Julio; Hormigo, Javier; Gonzalez-Navarro, Sonia
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收藏
Unbiased Rounding for HUB Floating-Point Addition
IEEE TRANSACTIONS ON COMPUTERS
IF
3.8
2018-09-01
4
OA
AI
Villalba-Moreno, Julio; Hormigo, Javier; Gonzalez-Navarro, Sonia
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Introduction to the Special Issue on Computer Arithmetic
IEEE TRANSACTIONS ON COMPUTERS
IF
3.8
2017-12-01
0
OA
AI
Hormigo, Javier; Muller, Jean-Michel; Oberman, Stuart; Revol, Nathalie; Tisserand, Arnaud; Villalba-Moreno, Julio
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HUB Floating Point for Improving FPGA Implementations of DSP Applications
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
IF
4.9
2017-03-01
12
PRE
AI
Hormigo, Javier; Villalba, Julio
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Decimal Multiformat Online Addition
IEEE TRANSACTIONS ON COMPUTERS
IF
3.8
2016-10-01
0
PRE
AI
Garcia-Vega, Carlos; Gonzalez-Navarro, Sonia; Chica, Pedro Balboa-La; Villalba-Moreno, Julio
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New Formats for Computing with Real-Numbers under Round-to-Nearest
IEEE TRANSACTIONS ON COMPUTERS
IF
3.8
2016-07-01
17
OA
AI
Hormigo, Javier; Villalba, Julio
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Multioperand Redundant Adders on FPGAs
IEEE TRANSACTIONS ON COMPUTERS
IF
3.8
2013-10-01
15
PRE
AI
Hormigo, Javier; Villalba, Julio; Zapata, Emilio L.
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Radix-2 Multioperand and Multiformat Streaming Online Addition
IEEE TRANSACTIONS ON COMPUTERS
IF
3.8
2012-06-01
10
PRE
AI
Villalba Moreno, Julio; Lang, Tomas; Hormigo, Javier
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Redundant Floating-Point Decimal CORDIC Algorithm
IEEE TRANSACTIONS ON COMPUTERS
IF
3.8
2011-01-01
4
PRE
AI
Vazquez, Alvaro; Villalba-Moreno, Julio; Antelo, Elisardo; Zapata, Emilio L.
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Enhanced Scaling-Free CORDIC
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF
5.2
2010-07-01
55
PRE
AI
Jaime, Francisco J.; Sanchez, Miguel A.; Hormigo, Javier; Villalba, Julio; Zapata, Emilio L.
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Low-latency pipelined 2D and 3D CORDIC processors
IEEE TRANSACTIONS ON COMPUTERS
IF
3.8
2008-01-01
19
PRE
AI
Antelo, Elisardo; Villalba, Julio; Zapata, Emilio L.
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Double-residue modular range reduction for floating-point hardware implementations
IEEE TRANSACTIONS ON COMPUTERS
IF
3.8
2006-03-01
6
PRE
AI
Villalba, J; Lang, T; Gonzalez, MA
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High performance rotation architectures based on the radix-4 CORDIC algorithm
IEEE TRANSACTIONS ON COMPUTERS
IF
3.8
1997-01-01
82
PRE
AI
Antelo, E; Villalba, J; Bruguera, JD; Zapata, EL
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研究方向
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合作学者
合作期刊
T
T. Lang
H 指数: 34 · 论文数: 201
J
Jean‐Michel Muller
H 指数: 32 · 论文数: 323
J
J.D. Bruguera
H 指数: 23 · 论文数: 131
M
Miguel Á. Alfonso‐Sánchez
H 指数: 20 · 论文数: 96
E
E. Antelo
H 指数: 19 · 论文数: 51
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