Leibo Liu - Publications, H-index & Citations

Leibo Liu

tsinghua university

42H指数

552论文数

7.8K被引数

收录论文 97

发表时间

RedPanda: A Unified Compilation Framework for Dataflow-Based CGRAs and High-Level Synthesis RedPanda：面向数据流架构CGRAs和高阶综合的统一编译框架

IEEE Transactions on Parallel and Distributed Systems

IF6

2026-08-12

PREAI

Yi Huang; Xiangyu Kong; Jianfeng Zhu; Mingyu Gao; Shaojun Wei; Aoyang Zhang; Leibo Liu

HUTAO: A Reconfigurable Homomorphic Processing UniT With Cache-Aware Operation Scheduling HUTAO：一种带缓存感知操作调度的可重构同态处理单元

IEEE Journal of Solid-State Circuits

IF5.6

2026-02-10

PREAI

Sijia Lu; Wenping Zhu; Bohan Yang; Jiajun Yang; Tongwei Dai; Chen Chen; Xiangdong Han; Jinjiang Yang; Hanning Wang; Min Zhu; Shaojun Wei; Aoyang Zhang; Leibo Liu

SiWB: A 28-nm 800-MHz 4.2-to-14.2-Gb/s/W Configurable Multi-Core Architecture for White-Box Block Cipher With Area-Efficient Random Linear Transformation and Load-Aware Inter-Core Scheduling SiWB: 一种面向白盒分组密码的28纳米800兆赫4.2至14.2吉比特每秒每瓦可配置多核架构，具有面积高效的随机线性变换和负载感知的核间调度

IEEE Journal of Solid-State Circuits

IF5.6

2026-01-28

PREAI

Xiangren Chen; Bohan Yang; Wenping Zhu; Hanning Wang; Jinjiang Yang; Min Zhu; Aoyang Zhang; Leibo Liu

A 77.35 TOPS/W Transformer Processor Exploiting Multi-Scope Similarity in Attention Computing 每瓦77.35 TOPS利用注意力计算中多范围相似性的Transformer处理器

IEEE Journal of Solid-State Circuits

IF5.6

2025-12-10

PREAI

Yang Wang; Yubin Qin; Dazheng Deng; Xiaolong Yang; Zhiren Zhao; Ruiqi Guo; Zhiheng Yue; Leibo Liu; Shaojun Wei; Yang Hu; Shouyi Yin

A 28-nm Software-Defined Accelerator Chip With Circuit-Pipeline Scaling and Intrinsic Physical Unclonable Function Enabling Secure Configuration 一款采用电路流水线扩展和固有物理不可克隆函数实现安全配置的28纳米软件定义加速器芯片

IEEE Journal of Solid-State Circuits

IF5.6

2025-08-01

PREAI

Jianfeng Zhu; Bohan Yang; Longlong Chen; Jinyi Chen; Yong Zhang; Liangwei Li; Liwei Zhang; Hanning Wang; Shaojun Wei; Leibo Liu

EDWAC: A Deadlock-Free Scheme for Compiling Whole Programs Onto Dynamically Reconfigurable Dataflow Architectures EDWAC: 一种无死锁的方案，用于将整个程序编译到动态可重新配置的数据流体系结构上

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

IF2.9

2025-05-21

PREAI

Jinyi Chen; Jianfeng Zhu; Xingchen Man; Guihuan Song; Zijiao Ma; Shanxin Chen; Chunyang Feng; Yang Liu; Shaojun Wei; Leibo Liu

A 28-nm 239-bp/μJ Agile Pangenome Analysis Accelerator for Multi-Scheme Read Mapping 一种28纳米工艺、239毫微焦耳/微秒的敏捷泛基因组分析加速器，用于多方案读序列映射

IEEE Journal of Solid-State Circuits

IF5.6

2025-01-01

PREAI

Yichi Zhang; Jianfeng Zhu; Liangwei Li; Gang Zeng; Dibei Chen; Tairan Zhang; Yeyang Deng; Zhicheng Gong; Aoyang Zhang; Yang Liu; Shaojun Wei; Leibo Liu

A Compact and Efficient Hardware Accelerator for RNS-CKKS En/Decoding and En/Decryption 用于rns-ckks En/解码和En/解密的紧凑高效的硬件加速器

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

2025-01-01

PREAI

Wang, Jianfei; Yang, Chen; Hou, Jia; Zhang, Fahong; Meng, Yishuo; Su, Yang; Liu, Leibo

Software-defined process-near-memory architecture using 3D hybrid bonding integration

SCIENCE CHINA-INFORMATION SCIENCES

IF7.6

2024-12-17

PREAI

Xu, Anlin; Deng, Chenchen; Zhu, Jianfeng; Wang, Yao; Wei, Shaojun; Liu, Leibo