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Jean-Luc Béchennec

nantes universite

10H指数
87论文数
300被引数
收录论文 3
发表时间
Cost-optimal timed trace synthesis for scheduling of intermittent embedded systems
err2022-12-20
err0
errOAAI
errBernabeu, Antoine; Bechennec, Jean-Luc; Briday, Mikael; Faucou, Sebastien; Roux, Olivier
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Harmless, a hardware architecture description language dedicated to real-time embedded system simulation
err2012-09-01
err9
errOAAI
errKassem, Rola; Briday, Mikael; Bechennec, Jean-Luc; Savaton, Guillaume; Trinquet, Yvon
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