Luis Entrena - Publications, H-index & Citations

Luis Entrena

Universidad Carlos III de Madrid

25H指数

187论文数

2.4K被引数

收录论文 15

发表时间

Analysing the radiation reliability, performance and energy consumption of low-power SoC through heterogeneous parallelism

SUSTAINABLE COMPUTING-INFORMATICS & SYSTEMS

IF5.7

2024-12-01

PREAI

Badia, Jose M.; Leon, German; Garcia-Valderas, Mario; Belloch, Jose A.; Lindoso, Almudena; Entrena, Luis

Supervised Triple Macrosynchronized Lockstep (STMLS) Architecture for Multicore Processors

IEEE ACCESS

IF3.6

2023-01-01

OAAI

Aviles, Pablo M.; Belloch, Jose A.; Entrena, Luis; Lindoso, Almudena

Formal Verification of Fault-Tolerant Hardware Designs

IEEE ACCESS

IF3.6

2023-01-01

OAAI

Entrena, Luis; Sanchez-Clemente, Antonio J.; Garcia-Astudillo, Luis A.; Portela-Garcia, Marta; Garcia-Valderas, Mario; Lindoso, Almudena; Sarmiento, Roberto

Reduced Resolution Redundancy: A Novel Approximate Error Mitigation Technique

IEEE ACCESS

IF3.6

2022-01-01

OAAI

Garcia-Astudillo, Luis A.; Entrena, Luis; Lindoso, Almudena; Martin, Honorio

A True Random Number Generator Based on Gait Data for the Internet of You

IEEE ACCESS

IF3.6

2020-01-01

OAAI

Camara, Carmen; Martin, Honorio; Peris-Lopez, Pedro; Entrena, Luis

Towards a Dependable True Random Number Generator With Self-Repair Capabilities 走向具有自修复能力的可靠真随机数发生器

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

IF5.2

2018-01-01

OAAI

Martin, Honorio; Di Natale, Giorgio; Entrena, Luis

Error Mitigation Using Approximate Logic Circuits: A Comparison of Probabilistic and Evolutionary Approaches 使用近似逻辑电路减轻错误: 概率和进化方法的比较

IEEE TRANSACTIONS ON RELIABILITY

IF5.7

2016-12-01

OAAI

Sanchez-Clemente, Antonio J.; Entrena, Luis; Hrbacek, Radek; Sekanina, Lukas

A Hardware-Software Approach for On-Line Soft Error Mitigation in Interrupt-Driven Applications

IEEE TRANSACTIONS ON DEPENDABLE AND SECURE COMPUTING

IF7.5

2016-07-01

OAAI

Martinez-Alvarez, Antonio; Restrepo-Calle, Felipe; Cuenca-Asensi, Sergio; Reyneri, Leonardo M.; Lindoso, Almudena; Entrena, Luis

Online Test of Control Flow Errors: A New Debug Interface-Based Approach

IEEE TRANSACTIONS ON COMPUTERS

IF3.8

2016-06-01

OAAI

Du, Boyang; Reorda, Matteo Sonza; Sterpone, Luca; Parra, Luis; Portela-Garcia, Marta; Lindoso, Almudena; Entrena, Luis

Low-Power Design in Aerospace Circuits: A Case Study

IEEE AEROSPACE AND ELECTRONIC SYSTEMS MAGAZINE

IF3.8

2013-12-01

PREAI

Mengibar-Pozo, Luis; Lorenz, Michael G.; Lopez, Celia; Entrena, Luis

Soft Error Sensitivity Evaluation of Microprocessors by Multilevel Emulation-Based Fault Injection

IEEE TRANSACTIONS ON COMPUTERS

IF3.8

2012-03-01

PREAI

Entrena, L.; Garcia-Valderas, M.; Fernandez-Cardenal, R.; Lindoso, A.; Portela Garcia, M.; Lopez-Ongil, C.

Fault Injection in Modern Microprocessors Using On-Chip Debugging Infrastructures

IEEE TRANSACTIONS ON DEPENDABLE AND SECURE COMPUTING

IF7.5

2011-03-01

PREAI

Portela-Garcia, Marta; Lopez-Ongil, Celia; Garcia Valderas, Mario; Entrena, Luis

Low power data processing system with self-reconfigurable architecture 具有自重构结构的低功耗数据处理系统

JOURNAL OF SYSTEMS ARCHITECTURE

IF4.1

2007-09-01

PREAI

Lorenz, Michael G.; Mengibar, Luis; SanMillan, Enrique; Entrena, Luis

Theoretical comparison between sequential redundancy addition and removal and retiming optimization techniques 顺序冗余添加和删除与重定时优化技术的理论比较

JOURNAL OF SYSTEMS ARCHITECTURE

IF4.1

2003-12-01

PREAI

San Millán, E; Entrena, L; Espejo, JA; López, C

Information technology security using cryptography

IEEE AEROSPACE AND ELECTRONIC SYSTEMS MAGAZINE

IF3.8

2003-06-01

PREAI

Sanchez-Reillo, R; Lopez-Ongil, C; Entrena-Arrontes, L; Sanchez-Avila, C

研究方向