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V

Vijaya Lakshmi

indian institute of technology system (iit system)

3H指数
5论文数
57被引数
收录论文 3
发表时间
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In-Memory Implementation of an Approximate Adder With Reduced Latency and Error具有减少的延迟和错误的近似加法器的内存中实现
errIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF5.2
err2024-01-01
err0
PREAI
errLakshmi, Vijaya; Pudi, Vikramkumar; Reuben, John
err分享
err收藏
Inner Product Computation In-Memory Using Distributed Arithmetic
errIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF5.2
err2022-11-01
err2
errOAAI
errLakshmi, Vijaya; Pudi, Vikramkumar; Reuben, John
err分享
err收藏
A Novel In-Memory Wallace Tree Multiplier Architecture Using Majority Logic
errIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF5.2
err2022-03-01
err20
errOAAI
errLakshmi, Vijaya; Reuben, John; Pudi, Vikramkumar
err分享
err收藏

研究方向

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合作学者
合作期刊
V
Vikramkumar Pudi
H 指数: 16 · 论文数: 63
J
John Reuben
H 指数: 12 · 论文数: 41
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