Chia‐Hsiang Yang - Publications, H-index & Citations

Chia‐Hsiang Yang

national taiwan university

23H指数

164论文数

1.8K被引数

收录论文 38

发表时间

A Runtime Reconfigurable Array (RTRA) for Multiprogram ML and DSP Acceleration With Hierarchical Partitioning and On-Chip Multilevel Scheduling 一种具有层次化分区和片上多级调度的运行时可重构阵列（RTRA），用于多程序机器学习（ML）和数字信号处理（DSP）加速

IEEE Journal of Solid-State Circuits

IF5.6

2026-07-31

PREAI

Hongseok Lee; Jack Burd; Tim Ling; Yao-Kai Yang; Nian-Shyang Chang; Wen-Ching Chen; Chi-Shi Chen; Tzi-Dar Chiueh; Michael Kuan-Tse Lee; Chia-Hsiang Yang; Dejan Marković

A 40-nm 3.9mW, 200words/Min Neural Signal Processor in Speech Decoding for Brain-Machine Interface 一款40-nm、3.9mW、200words/Min的用于脑机接口语音解码的神经信号处理器

IEEE Transactions on Biomedical Circuits and Systems

IF4.9

2025-11-13

PREAI

Tun-Yu Chang; Jeng-Bang Wang; Yu-Hsuan Tsai; Yu Tsao; Chia-Hsiang Yang

A 40-nm 209-TOPS/W Reinforcement Learning Processor With Full Speculation Exploitation and Inference-Training Parallel Processing 一款采用40-nm工艺、功耗为209 TOPS/W的强化学习处理器，具备完全的投机性利用功能及推理-训练并行处理能力。

IEEE Journal of Solid-State Circuits

IF5.6

2025-11-07

PREAI

Shih-Hao Chen; Ping-Sheng Wu; Brian Dean Soon; Chao-Hung Chen; Chih-Wei Liu; Chun-Lung Hsu; Chia-Hsiang Yang

A 4.8-mW Hybrid Crypto SoC With Post-Quantum Cryptography and Lightweight Cryptography for Secure Neural Interfacing 一款集成后量子密码学与轻量化密码学的4.8毫瓦混合加密片上系统，用于安全神经接口

IEEE Journal of Solid-State Circuits

IF5.6

2025-09-03

PREAI

Liang-Hsin Lin; Zih-Sing Fu; Po-Shao Chen; Bo-Yin Yang; Chia-Hsiang Yang

A 40-nm 26.4 mW, 18.6 MS/s Image Reconstruction Processor for IoT Compressive Sensing 40-nm、26.4 mW、18.6 MS/s物联网压缩感知图像重建处理器

IEEE Journal of Solid-State Circuits

IF5.6

2025-08-14

PREAI

Yu-Cheng Lin; Chanmin Park; Wenda Zhao; Nan Sun; Youngcheol Chae; Chia-Hsiang Yang

Short and Endurance Squeeze Contractile Integral in High-Resolution Anorectal Manometry Is Correlated With Vaizey Incontinence Score-A Pilot Study 高分辨率肛门直肠测压中的短耐力挤压试验收缩积分与Vaizey失禁评分相关—一项初步研究

JOURNAL OF GASTROENTEROLOGY AND HEPATOLOGY

IF3.4

2025-05-08

PREAI

Jia-Feng Wu; Tzung-Hsin Chou; Ping-Huei Tseng; I-Jung Tsai; Hui-Chuan Lee; Yao-Kai Yang; Chia-Hsiang Yang

A 28nm Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing 一种用于下一代测序的28nm全集成端到端基因组分析加速器

IEEE Transactions on Biomedical Circuits and Systems

IF4.9

2025-03-27

PREAI

Yi-Chung Wu; Yen-Lung Chen; Chung-Hsuan Yang; Chao-Hsi Lee; Wen-Ching Chen; Liang-Yi Lin; Nian-Shyang Chang; Chun-Pin Lin; Chi-Shi Chen; Jui-Hung Hung; Chia-Hsiang Yang

A 28-nm 142-mW Motion-Control SoC for Autonomous Mobile Robots 一款面向自主移动机器人的28纳米、142毫瓦运动控制SoC

IEEE Journal of Solid-State Circuits

IF5.6

2025-01-01

PREAI

I-Ting Lin; Zih-Sing Fu; Wen-Ching Chen; Liang-Yi Lin; Nian-Shyang Chang; Chun-Pin Lin; Chi-Shi Chen; Chia-Hsiang Yang

A 40-nm 131-mW 6.4-Gb/s 256 × 32 Multi-User MIMO OTFS Detector for Next-Gen Communication Systems 一款40-nm、131-mW、6.4-Gb/s、256 × 32多用户MIMO OTFS检测器，用于下一代通信系统

IEEE Journal of Solid-State Circuits

IF5.6

2025-01-01

PREAI

Tang Lee; Ting-Yang Chen; I-Hsuan Liu; Chia-Hsiang Yang