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Accurate Fixed-Point Logarithmic Converter
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DOI：10.1109/TCSII.2014.2327306.png)
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摘要
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The hardware computation of the logarithm function is required in several applications, ranging from signal and image processing to telecommunication systems. This brief shows that most of previous proposed logarithmic converters, based on piecewise linear approximations, suffer from large errors when dealing with fixed-point input values with many fractional bits, a situation often encountered in practical applications. Thus, this brief proposes a novel logarithmic converter, using nonuniform segmentation and piecewise linear approximation. A rigorous technique that allows computing the optimal segmentation and the coefficients values for a prescribed precision is described in this brief. For fixed-point input values, the proposed approach allows obtaining a sensibly lower error, for the same number of nonuniform segments, compared with previously published results. Implementation details and synthesis results in a 65-nm CMOS technology are also presented.
Keyword:
Computer arithmetic
digital signal processing
logarithm
very-large-scale integration (VLSI) systems
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4.9
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