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Comparing parallel hardware architectures for visually guided robot navigation
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DOI：10.1002/cpe.3833.png)
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Local visual homing methods are a family of algorithms for visually guided navigation on mobile robots. Within this family, the so-called min-warping algorithm yields very precise results but is rather computeintensive. For this reason, we developed several implementations of this algorithm for different parallel hardware architectures (multi-core CPUs with SIMD extensions, graphics processing units (GPUs), field-programmable gate array) to arrive at a fast and energy-efficient solution which is suited for real-time performance on mobile platforms with limited battery capacity. Because the min-warping algorithm is also well suited as a general benchmark, we carried out a comprehensive comparison study which includes both speed and real-power measurements and covers both low-power processors and high-end devices. Our findings suggest that field-programmable gate arrays offer the most energy-efficient platform for min-warping in the area of low-power processors, while GPUs take the lead in the area of high-end devices. However, as soon as the full capabilities of modern CPUs (like vector execution units and multiple hardware threads) are used, the speedup advantage of GPUs goes down to the single digit range. Copyright (C) 2016 John Wiley & Sons, Ltd.
Keyword:
GPU
FPGA
SIMD
performance analysis
power efficiency
robot navigation
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