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Development of thermal memory cells on silicon using the floating zero algorithm
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DOI：10.1038/s41598-025-89566-0.png)
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摘要
En 中文
In this article, we investigate the development and use of thermal memory elements based on thin-film aluminum devices on silicon wafer. To stabilize their operation and reduce the number of errors during the read/write process of thermal information in such devices, we propose an algorithm (referred to as the floating zero algorithm) for adjusting the temperature conditions of thermal memory cells. This algorithm controls the thermal memory cells on silicon under varying ambient temperature conditions. We tested the algorithm performance using an experimental thermal memory sample at room temperature. Additionally, we conducted a study on the degradation process of the sample under high electrothermal loading conditions. The results showed that the degradation process in the sample starts when a single current pulse of duration tau i >= 100 mu s and amplitude density ji >= 8.5 x 1010 A/m2) flows through the device. We propose a criterion for determining the safe operation area gamma of the device under investigation and experimentally determine its value gamma = 6.0(VA root s).
Keyword:
Thermal memory element on silicon
Read/write thermal information
Error correction
Floating zero algorithm
Electrothermal degradation process
Safe operation area
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IF:
3.9
论文数:
28.2W
被引数:
83.5W
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