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Experiment Demonstration of Hybrid-Orientation Sequential CFET Boosting Hole Mobility

delete2026-06-12
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PRE
AI
K
Kun Yang
Z
Zhongrui Wang
Z
Zhongshan Xie
H
Hang Zhang
M
Mingzhu Yan
J
Junjie Li
Y
Yanyi Pan
Y
Yingze Ren
Y
Yupeng Lu
J
Jinbiao Liu
M
Meihe Zhang
Y
Yadong Zhang
L
Lei Cao
Q
Qingzhu Zhang
李峻峰 cover
李峻峰 (Junfeng Li)
H
Huaxiang Yin
X
Xiaolei Wang
罗俊 (Jun Luo)
DOI:10.1109/led.2026.3702148delete
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Abstract

Abstract

En 中文
The complementary field-effect transistor (CFET) has garnered substantial research interest in next-generation electronics owing to its superior area-scaling in footprint. However, mismatched drive currents between n- and pFET severely degrade CFET area efficiency. Herein, we demonstrate a hybrid-orientation-sequential CFET featuring a (110) Si channel to boost pFET performance. The effective hole mobility is enhanced by a factor of 2.27 relative to its (100) counterpart, peaking at 85.8 cm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>/(V<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\cdot $ </tex-math></inline-formula>s). Moreover, balanced driving current of n/pFET is achieved via a low-thermal-budget process (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\le 500~^{\circ }$ </tex-math></inline-formula>C), with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$296.8~\mu $ </tex-math></inline-formula>A/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula>m for pFET and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$328.5~\mu $ </tex-math></inline-formula>A/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula>m for nFET at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {DD}} =1.2$ </tex-math></inline-formula> V, respectively. Furthermore, the measured voltage transfer curve (VTC) of hybrid-orientation-sequential CFET yields a high voltage gain of 41 V/V. The proposed hybrid-orientation seqCFET offers a promising integration scheme for highly dense logic circuit.
Keywords:
Sequential CFET
hybrid surface orientation
3D integration
low thermal budget process
current mismatch

Journal

IEEE Electron Device Letters cover
IEEE Electron Device Letters
IF:
4.5
Papers:
614
Citations:
2.3W

Organization

C
chinese academy of sciences
Scholars:
54.9W
Papers: 44.5W
Citations: 703
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