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GPU-Accelerated Sparse LU Factorization for Circuit Simulation with Performance Modeling

delete2015-03-01
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PRE
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C
Chen, Xiaoming *
L
Ling Ren
王喻 封面图
王喻 (Yu Wang)
DOI:10.1109/TPDS.2014.2312199delete
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摘要

摘要

En 中文
The sparse matrix solver by LU factorization is a serious bottleneck in Simulation Program with Integrated Circuit Emphasis (SPICE)-based circuit simulators. The state-of-the-art Graphics Processing Units (GPU) have numerous cores sharing the same memory, provide attractive memory bandwidth and compute capability, and support massive thread-level parallelism, so GPUs can potentially accelerate the sparse solver in circuit simulators. In this paper, an efficient GPU-based sparse solver for circuit problems is proposed. We develop a hybrid parallel LU factorization approach combining task-level and data-level parallelism on GPUs. Work partitioning, number of active thread groups, and memory access patterns are optimized based on the GPU architecture. Experiments show that the proposed LU factorization approach on NVIDIA GTX580 attains an average speedup of 7.02 x (geometric mean) compared with sequential PARDISO, and 1.55x compared with 16-threaded PARDISO. We also investigate bottlenecks of the proposed approach by a parametric performance model. The performance of the sparse LU factorization on GPUs is constrained by the global memory bandwidth, so the performance can be further improved by future GPUs with larger memory bandwidth.
Keyword:
Graphics processing unit
parallel sparse LU factorization
circuit simulation
performance model
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期刊

IEEE Transactions on Parallel and Distributed Systems 封面图
IEEE Transactions on Parallel and Distributed Systems
IF:
6
论文数:
5.2K
被引数:
1.1W

机构

T
tsinghua university
学者数:
11.9W
论文数: 10.0W
被引数: 137
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