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Novel strained superjunction VDMOS
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DOI：10.1016/j.spmi.2015.05.026.png)
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In this paper, we have proposed novel strained superjunction (s-SJ) vertical double diffused MOS (VDMOS). Through channel engineering, we have introduced strain effects in s-SJ device using thin separate p-type silicon-germanium (p-SiGe) layer over silicon p-pillar. Further, we have designed process flow for the possible fabrication of s-Si VDMOS. The proposed s-SJ devices fitted with less input capacitance (C-in) and 1.2 similar to 3 times higher output current density than conventional SJ VDMOS. Therefore, 40% less gate charge (Q(g)) is required to turn-on the s-Si VDMOS and R(on)A is optimized in between 12% and 46%. (C) 2015 Elsevier Ltd. All rights reserved.
Keyword:
Strained-superjunction
Compressive stress
Tensile stress
Gate charge
Breakdown voltage
Area specific ON-resistance
Switching frequency
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