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Optimizing 55 nm split-gate memory for compute-in-memory: a focus on floating-gate engineering

delete2026-03-01
delete0
PRE
AI
W
Wanyi Ling
R
Ranran Liu
K
Kun Ren
D
Dianyu Qi
Y
Yongyu Wu
G
Guangji Li
M
Miao Zhou
Q
Qingshuang Xu
Z
Zhenghui Xia
X
Xuan Li
D
Dertsyr Fan
I
Ichun Chuang
T
Tzung Wen Cheng
C
Chenming Tsai
D
Dawei Gao
DOI：10.1088/1674-4926/25060033delete
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摘要

摘要

En 中文
对高性能人工智能（AI）计算需求的不断升级，加剧了冯·诺依曼架构的“内存瓶颈”，促使对计算内存储（CIM）解决方案进行广泛探索。本研究聚焦于优化一种适用于CIM应用的高效、低功耗“L”形分裂栅浮栅（FG）存储器。该存储器基于55 nm CMOS平台制造，并通过晶圆验收测试（WAT）、Sentaurus™模拟以及与DNN + NeuroSim Framework V2.0框架的全面评估进行了系统性研究。在具有不同FG长度的器件中，95 nm FG变体表现出卓越性能：实现了5.35 V的存储窗口，在变化电压和宽度脉冲方案（VWPS）下达到16.7 μS的最大电导并具有优异的线性度，实现了32级多级存储，并使用VGG8神经网络在CIFAR-10数据集上达到92%的训练准确率。
Keyword:
compute-in-memory
floating-gate memory
split-gate
CMOS
neural network training

期刊

Journal of Semiconductors 封面图
Journal of Semiconductors
IF:
5.3
论文数:
277
被引数:
4.0K

机构

I
iotmemory technology inc.
学者数:
4
论文数: 1
被引数: 0
Z
zhejiang icsprout semiconductor
学者数:
12
论文数: 3
被引数: 0
Z
zhejiang university
学者数:
17.7W
论文数: 12.1W
被引数: 152
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