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Room Temperature Fluorination: A Cost-Effective V<sub>TH</sub> Engineering Solution for BEOL Oxide Semiconductor FETs Enabling Inverters With Record Gain of 2687 and High Noise Margin
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DOI：10.1109/led.2026.3695020.png)
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Abstract
En 中文
In this letter, we present a room temperature fluorination (RTF) treatment that offers a low-cost, back-end-of-line (BEOL)-compatible route to threshold voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}\text {)}$ </tex-math></inline-formula> engineering in oxide semiconductor (OS) FETs. Under the optimized condition, a 100 nm channel length ITO:F FET exhibits near-zero <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}$ </tex-math></inline-formula>, nearly hysteresis-free operation, and a subthreshold swing (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SS</i>) of 68 mV/dec. AFM measurements indicate no obvious plasma-induced roughening after RTF, while XPS confirms fluorine incorporation after the treatment. Selective application of RTF enables a BEOL-compatible inverter with a record-high DC voltage gain of 2687 V/V at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {DD}} =4$ </tex-math></inline-formula> V. A unipolar inverter composed of 200 nm channel length (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${L}_{\text {CH}}\text {)}$ </tex-math></inline-formula> FETs further achieves a static noise margin (SNM) of 0.41 V at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {DD}} =1$ </tex-math></inline-formula> V. These results highlight RTF as a practical path toward scalable, low-voltage oxide logic for monolithic 3D integration.
Keywords:
VTH modulation
ITO
fluorine plasma treatment
field-effect transistor
inverter
BEOL
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