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Sequential in-core sorting performance for a SQL data service and for parallel sorting on heterogeneous clusters
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DOI：10.1016/j.future.2006.02.014.png)
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摘要
En 中文
The aim of the paper is to introduce techniques in order to tune sequential in-core sorting algorithms in the frameworks of two applications. The first application is parallel sorting when the processor speeds are not identical in the parallel system. The second application is the Zeta-Data Project [M. Koskas, A hierarchical database management algorithm, in: Annales 67 du Lamsade, vol. 2, 2004, pp. 277-317. [9]] whose aim is to develop novel algorithms for databases issues. About 50% of the work done in building indexes is devoted to sorting sets of integers. We develop and compare algorithms built to sort with equal keys. Algorithms are variations of the 3Way-Quicksort of Sedgewick. In order to observe performances and to fully exploit functional units in processors, and also in order to optimize the use of the memory system and the different functional units, we use hardware performance counters that are available on most modem microprocessors. We also develop analytical results for one of our algorithms and compare expected results with the measures. For the two applications, we show, through fine experiments on an Athlon processor (a three-way superscalar x86 processor), that L1 data cache misses are not the central problem, but a subtle proportion of independent retired instructions should be advised to get performance for in-core sorting. (C) 2006 Elsevier B.V. All rights reserved.
Keyword:
hardware performance counters
in-core sorting algorithms with equal keys
two-level memory hierarchy
optimizing memory accesses
parallelism at the chip level
data structures for databases
parallel sorting
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期刊
F
IF:
6.1
论文数:
6.8K
被引数:
2.3W
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