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A computing-in-memory macro based on three-dimensional resistive random-access memory
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DOI：10.1038/s41928-022-00795-x.png)
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Abstract
En 中文
Three-dimensional computing-in-memory circuits based on vertical resistive random-access memory and complementary metal-oxide-semiconductor technologies can be used to create efficient hardware for artificial neural networks. Non-volatile computing-in-memory macros that are based on two-dimensional arrays of memristors are of use in the development of artificial intelligence edge devices. Scaling such systems to three-dimensional arrays could provide higher parallelism, capacity and density for the necessary vector-matrix multiplication operations. However, scaling to three dimensions is challenging due to manufacturing and device variability issues. Here we report a two-kilobit non-volatile computing-in-memory macro that is based on a three-dimensional vertical resistive random-access memory fabricated using a 55 nm complementary metal-oxide-semiconductor process. Our macro can perform 3D vector-matrix multiplication operations with an energy efficiency of 8.32 tera-operations per second per watt when the input, weight and output data are 8, 9 and 22 bits, respectively, and the bit density is 58.2 bit mu m(-2). We show that the macro offers more accurate brain MRI edge detection and improved inference accuracy on the CIFAR-10 dataset than conventional methods.
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40.9
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OAAIShareSaveShareSaveCMOS-integrated memristive non-volatile computing-in-memory for AI edge processorsNATURE ELECTRONICS
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