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Adaptive Routing in Network-on-Chips Using a Dynamic-Programming Network

delete2011-08-01
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OA
AI
T
Terrence Mak *
P
Peter Y. K. Cheung
DOI:10.1109/TIE.2010.2081953delete
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Abstract

Abstract

En 中文
Dynamic routing is desirable because of its substantial improvement in communication bandwidth and intelligent adaptation to faulty links and congested traffic. However, implementation of adaptive routing in a network-on-chip system is not trivial and is further complicated by the requirements of deadlock-free and real-time optimal decision making. In this paper, we present a deadlock-free routing architecture which employs a dynamic programming (DP) network to provide on-the-fly optimal path planning and network monitoring for packet switching. Also, a new routing strategy called k-step look ahead is introduced. This new strategy can substantially reduce the size of routing table and maintain a high quality of adaptation which leads to a scalable dynamic-routing solution with minimal hardware overhead. Our results, based on a cycle-accurate simulator, demonstrate the effectiveness of the DP network, which outperforms both the deterministic and adaptive-routing algorithms in average delay on various traffic scenarios by 22.3%. Moreover, the hardware overhead for DP network is insignificant, based on the results obtained from the hardware implementations.
Keywords:
Adaptive routing
Bellman equation
dynamic programming (DP)
DP network
network-on-chip (NoC)

Journal

IEEE Transactions on Industrial Electronics cover
IEEE Transactions on Industrial Electronics
IF:
7.2
Papers:
1.8W
Citations:
9.8W

Organization

N
newcastle university - uk
Scholars:
2.9W
Papers: 2.6W
Citations: 39
C
Chinese University of Hong Kong
Scholars:
3.4W
Papers: 3.2W
Citations: 5.6W
I
Imperial College London
Scholars:
8.3W
Papers: 7.3W
Citations: 11.1W
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