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Peter Y. K. Cheung

Imperial College London

39H-index
380Paper Count
6.2KCitation Count
Published Papers 21
Publication Date
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ID: 4348379 MAPPING THE INVISIBLE: SPATIAL ERP MAPPING AS A TARGETABLE MARKER OF ARRHYTHMOGENIC SUBSTRATE
errheart rhythm
IF2.9
err2025-09-03
err0
errOAAI
errMoez Alnazeer; Peter Cheung; Ajay Tripuraneni; Greg Olsovsk; Javier E. Banchs
errShare
errSave
Verification and Fault Injection Platform Based on MTB Stimulus Generation Method for L2 Deep Market Quote Decoder
errIEEE ACCESS
IF3.6
err2024-01-01
err0
errOAAI
errYu, Le; Liang, Zhiheng; Li, Yaqi; Zhang, Shiwei; Zhao, Yiren; Cheung, Peter Y. K.
errShare
errSave
Logic Shrinkage: Learned Connectivity Sparsification for LUT-Based Neural Networks
errACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS
IF2.8
err2023-09-01
err0
PREAI
errWang, Erwei; Auffret, Marie; Stavrou, Georgios-Ilias; Cheung, Peter Y. K.; Constantinides, George A.; Abdelfattah, Mohamed S.; Davis, James J.
errShare
errSave
LUTNet: Learning FPGA Configurations for Highly Efficient Neural Network Inference
errIEEE TRANSACTIONS ON COMPUTERS
IF3.8
err2020-12-01
err34
errOAAI
errWang, Erwei; Davis, James J.; Cheung, Peter Y. K.; Constantinides, George A.
errShare
errSave
Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going
errACM COMPUTING SURVEYS
IF28
err2019-05-30
err130
errOAAI
errWang, Erwei; Davis, James J.; Zhao, Ruizhe; Ng, Ho-Cheung; Niu, Xinyu; Luk, Wayne; Cheung, Peter Y. K.; Constantinides, George A.
errShare
errSave
CypherDB: A Novel Architecture for Outsourcing Secure Database Processing
errIEEE TRANSACTIONS ON CLOUD COMPUTING
IF5
err2018-04-01
err6
PREAI
errChen, Bony H. K.; Cheung, Paul Y. S.; Cheung, Peter Y. K.; Kwok, Yu-Kwong
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errSave
KAPow: High-Accuracy, Low-Overhead Online Per-Module Power Estimation for FPGA Designs
errACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS
IF2.8
err2018-01-09
err12
errOAAI
errDavis, James J.; Hung, Eddie; Levine, Joshua M.; Stott, Edward A.; Cheung, Peter Y. K.; Constantinides, George A.
errShare
errSave
Mapping Adaptive Particle Filters to Heterogeneous Reconfigurable Systems
errACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS
IF2.8
err2014-12-29
err5
PREAI
errChau, Thomas C. P.; Niu, Xinyu; Eele, Alison; Maciejowski, Jan; Cheung, Peter Y. K.; Luk, Wayne
errShare
errSave
High-level power and performance estimation of FPGA-based soft processors and its application to design space exploration
errJOURNAL OF SYSTEMS ARCHITECTURE
IF4.1
err2013-11-01
err11
PREAI
errPowell, Adam; Savvas-Bouganis, Christos; Cheung, Peter Y. K.
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errSave
Introduction to Special Section FPGA 2009
errACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS
IF2.8
err2011-12-28
err0
PREAI
errCheung, Peter Y. K.
errShare
errSave
Adaptive Routing in Network-on-Chips Using a Dynamic-Programming Network
errIEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
IF7.2
err2011-08-01
err58
errOAAI
errMak, Terrence; Cheung, Peter Y. K.; Lam, Kai-Pui; Luk, Wayne
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errSave
Efficient Heterogeneous Architecture Floorplan Optimization using Analytical Methods
errACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS
IF2.8
err2010-12-01
err2
errOAAI
errKahoul, Asma; Smith, Alastair M.; Constantinides, George A.; Cheung, Peter Y. K.
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errSave
An Automated Flow for Arithmetic Component Generation in Field-Programmable Gate Arrays
errACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS
IF2.8
err2010-09-01
err0
errOAAI
errSmith, Alastair M.; Constantinides, George A.; Cheung, Peter Y. K.
errShare
errSave
Performance Comparison of Graphics Processors to Reconfigurable Logic: A Case Study
errIEEE TRANSACTIONS ON COMPUTERS
IF3.8
err2010-04-01
err65
PREAI
errCope, Ben; Cheung, Peter Y. K.; Luk, Wayne; Howes, Lee
errShare
errSave
Robust Real-Time Super-Resolution on FPGA and an Application to Video Enhancement
errACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS
IF2.8
err2009-09-01
err15
errOAAI
errAngelopoulou, Maria E.; Bouganis, Christos-Savvas; Cheung, Peter Y. K.; Constantinides, George A.
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errSave
Self-Measurement of Combinatorial Circuit Delays in FPGAs
errACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS
IF2.8
err2009-06-01
err47
PREAI
errWong, Justin S. J.; Sedcole, Pete; Cheung, Peter Y. K.
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errSave
Affective Level Video Segmentation by Utilizing the Pleasure-Arousal-Dominance Information
errIEEE TRANSACTIONS ON MULTIMEDIA
IF9.7
err2008-11-01
err40
PREAI
errArifin, Sutjipto; Cheung, Peter Y. K.
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errSave
Id-1 activation of PI3K/Akt/NFκB signaling pathway and its significance in promoting survival of esophageal cancer cells
errCARCINOGENESIS
IF2.9
err2007-09-07
err109
errOAAI
errLi, Bin; Cheung, Pak Yan; Wang, Xianghong; Tsao, Sai Wah; Ling, Ming Tat; Wong, Yong Chuan; Cheung, Annie L. M.
errShare
errSave
Optimal combined word-length allocation and architectural synthesis of digital signal processing circuits
errIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
IF4.9
err2006-05-01
err22
errOAAI
errCaffarena, Gabriel; Constantinides, George A.; Cheung, Peter Y. K.; Carreras, Carlos; Nieto-Taladriz, Octavio
errShare
errSave
A Gaussian noise generator for hardware-based simulations
errIEEE TRANSACTIONS ON COMPUTERS
IF3.8
err2004-12-01
err66
PREAI
errLee, DU; Luk, W; Villasenor, JD; Cheung, PYK
errShare
errSave

Research Directions

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Co-authors
Cooperation Journals
W
Wayne Luk
H-index: 54 · Papers: 820
S
Sai Wah Tsao
H-index: 47 · Papers: 254
A
Alastair Smith
H-index: 45 · Papers: 448
J
J.M. Maciejowski
H-index: 39 · Papers: 287
G
George A. Constantinides
H-index: 38 · Papers: 544
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