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Can C-Based ECC Models Leverage High-Level Synthesis? Evaluating Description Variants for Efficient Circuit Implementations
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DOI：10.1007/978-3-032-01241-8_10.png)
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Abstract
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Keywords:
Error-Correcting Codes
High-Level Synthesis
Fault-Tolerant Design
Dependable Systems
ASIC Implementation
FPGA Synthesis
Embedded Accelerators
Journal
C
IF:
0
Papers:
15
Citations:
0