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Luis-J. Saiz-Adalid

Universitat Politecnica de Valencia

12H-index
32Paper Count
347Citation Count
Published Papers 5
Publication Date
A Hybrid Technique Based on ECC and Hardened Cells for Tolerating Random Multiple-Bit Upsets in SRAM Arrays
err2024-01-01
err1
errOAAI
errGil-Tomas, Daniel; Saiz-Adalid, Luis J.; Gracia-Moran, Joaquin; Baraza-Calvo, J. Carlos; Gil-Vicente, Pedro J.
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Ultrafast Codes for Multiple Adjacent Error Correction and Double Error Detection
err2019-01-01
err7
errOAAI
errSaiz-Adalid, Luis-J; Gracia-Moran, Joaquin; Gil-Tomas, Daniel; Baraza-Calvo, J-Carlos; Gil-Vicente, Pedro-J
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Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System
err2016-06-01
err13
errOAAI
errGil-Tomas, Daniel; Gracia-Moran, Joaqu-N; Baraza-Calvo, J-Carlos; Saiz-Adalid, Luis-J; Gil-Vicente, Pedro-J
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Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor
err2014-03-01
err16
errOAAI
errGracia-Moran, Joaquin; Baraza-Calvo, J. Carlos; Gil-Tomas, Daniel; Saiz-Adalid, Luis J.; Gil-Vicente, Pedro J.
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