.png){kind=icon}
.png){kind=icon}
Return
Circuits to Systems: Codesigning Efficient AI Hardware
.png){kind=icon}
PRE
AI
DOI：10.1109/MDAT.2025.3600328.png)
.png){kind=icon}
Original request for help.png){kind=icon}
Share.png){kind=icon}
Save
Abstract
En 中文
Editor's notes: The authors explore the intertwined progress of circuit innovation and system architecture that has propelled AI development-from early neuro-morphic circuits to today's memory-centric accelerators. They review milestones such as processing-in-memory, GPUs, and systolic arrays and address emerging challenges from large language models. -Jorg Henkel, Vice-President of Publications, IEEE CEDA -L. Miguel Silveira, President, IEEE CEDA
Keywords:
Artificial intelligence
Hardware
Computer architecture
Graphics processing units
Quantization (signal)
Training
Systolic arrays
Deep learning
Computational modeling
Architecture
Circuit synthesis
Circuits
Systems
Co-design
Neuromorphic Computing
AI Acceleration
Large Language Models