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Comprehensive MOSFET Capacitance Characterization Based on Charge Trajectories

delete2025-07-01
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OA
AI
M
Michihiro Shintani
K
Kazuki Oishi
Y
Y. Nishitani
H
Hajime Takayama
T
Takashi Satō
DOI:10.1109/TED.2025.3572874delete
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Abstract

Abstract

En 中文
A novel method for determining the parasitic capacitance of power MOSFETs is proposed. Unlike conventional methods that rely on small-signal measurements under specific bias conditions, the proposed method leverages the instantaneous switching waveforms of a MOSFET to characterize its capacitance. The switching waveform inherently establishes appropriate bias voltages for all electrodes, reflecting real-world operating conditions. By analyzing charge transfer trajectories during switching, the gate-source, drain-gate, and drain-source capacitances are determined. Evaluations demonstrate that the capacitance models derived from the proposed method accurately reproduce the switching waveforms in a boost converter using a silicon carbide (SiC) MOSFET, leading to a ${4}\times $ reduction in switching timing errors compared to conventional models obtained through the small-signal measurements.
Keywords:
Circuit simulation
compact model
input capacitance
power MOSFET

Journal

IEEE Transactions on Electron Devices cover
IEEE Transactions on Electron Devices
IF:
3.2
Papers:
685
Citations:
3.7W

Organization

K
Kyoto University
Scholars:
5.1W
Papers: 4.6W
Citations: 6.1W
K
Kyoto Institute of Technology
Scholars:
2.3K
Papers: 2.0K
Citations: 1.9K