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Gate oxide damage and synergistic effect on the breakdown voltage under reverse bias stress for SiC MOSFET
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DOI：10.1088/1674-4926/25110026.png)
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Abstract
En 中文
High-temperature reverse bias (HTRB) is one of the most critical reliability for SiC MOSFET, and the termination region is widely regarded as the sensitive area under HTRB stress. Interestingly, through systematically monitoring of the degradation behavior of static electrical parameters under different voltage, this study reveals that the elevated reverse bias (ERB) stress can also induce damage in the gate oxide, which results in the hole trapping and a negative shift of the threshold voltage. Deep level transient spectroscopy (DLTS) measurements were performed and showed that the interface trap density in the gate oxide is promoted after ERB stress. Surprisingly, the reverse leakage current after ERB stress is significantly deteriorated at a gate bias of 0 V, while effectively suppressed by applying a negative gate bias (-5 V), which point to the synergistic effects of channel region on the breakdown voltage. Based on the gate oxide degradations and TCAD simulations, it is elucidated that the trapped positive interface charges in gate oxide cause band bending, leading to the formation of an electron accumulation layer in the channel region at 0 V gate bias and thus resulting in a dominant leakage path. This work reveals the impact and mechanism of the ERB stress induced gate oxide damage on the breakdown voltage and highlights the importance of gate oxide protection, which is of great significance for improving the reliability of SiC MOSFETs in elevated voltage applications.
Keywords:
elevated reverse bias stress
gate oxide degradation
synergistic effect
interface traps
SiC MOSFET
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