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GHOST: Graph-based Hardware Ownership Security through Traceability
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DOI：10.1007/s10836-026-06238-1.png)
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Abstract
En 中文
In the evolving landscape of hardware security, safeguarding intellectual property (IP) at the gate level remains a persistent challenge. This work presents a unified approach to watermarking both RTL and synthesised netlists, addressing the growing need for robust, traceable, and non-intrusive IP protection. By integrating graph neural networks (GNNs) to intelligently identify watermark insertion points, the method bridges a critical gap between functional preservation and security resilience. Unlike existing solutions that compromise either stealth or synthesis integrity, this approach ensures verifiable watermarking with minimal area overhead while maintaining circuit functionality, paving the way for trustworthy and scalable IP protection mechanisms in VLSI.
Keywords:
Gate-level
RTL
Graph neural network
Watermarking
Journal
J
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Papers:
21
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0