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High Threshold Voltage E-Mode MIS-HEMTs on 6-in GaN-on-Si: Fully Recessed Gate With N<sub>2</sub>/O<sub>2</sub> Plasma Treatment
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DOI：10.1109/ted.2026.3705020.png)
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Abstract
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To enhance the performance of enhancement-mode metal-insulator-semiconductor high-electron-mobility transistors with a fully etched gate barrier, this work comparatively investigates various plasma treatment schemes. The complete etching of the AlGaN barrier exposes the underlying GaN channel, making device performance highly dependent on interface quality, and thus necessitating a low-damage plasma treatment. Conventional N- or F- based plasmas induce additional interface damage, whereas the proposed N<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub>/O<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> mixed plasma treatment effectively mitigates plasma-induced defects, leading to surface states suppression and dielectric/semiconductor interface quality enhancement. After annealing, the surface roughness approaches that of the as-grown epitaxial wafer. Comprehensive characterizations of untreated, N<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub>/O<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub>, and O<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> treated devices reveal that the N<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub>/O<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> plasma treatment yields superior performance metrics, including reduced <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>-resistance, enhanced gate controllability, and elevated breakdown voltage (BV), alongside minimized threshold voltage shift and suppressed dynamic <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>-resistance degradation, thus significantly improving device reliability. Particularly, the <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small>-state drain–source BV was enhanced from 1003 to 1428 V, confirming the N<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub>/O<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> mixed plasma treatment as a highly promising strategy for performance optimization.
Keywords:
E-mode MIS-high-electron-mobility transistors (HEMTs)
fully recessed gate
interface state densities
interfacial quality
N2/O2 mixed plasma treatment
reliability
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3.2
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685
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