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Jitter-Quantizing-Based TRNG Robust Against PVT Variations

delete2020-01-01
delete17
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OA
AI
鲁迎春 (Yingchun Lu)
H
Huaguo Liang
L
Liang Yao
X
Xinyu Wang
H
Haochen Qi
M
Maoxiang Yi
C
Cuiyun Jiang
Z
Zhengfeng Huang *
DOI:10.1109/ACCESS.2020.3000231delete
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Abstract

Abstract

En 中文
Security is critical to the growing popularity of the Internet of Things(IoT), and true random number generator (TRNG) plays an increasingly important role in information security systems. Conventional TRNGs use natural physical stochastic processes including thermal noise, chaos-based circuit, and so on to generate random numbers. These analog circuits based TRNG structures often consume excessive hardware resources. Meanwhile, it is difficult to incorporate them into digital system. In this paper, a novel all-digital true random number generator in SRAM-based FPGAs is proposed by using Vernier technique that precisely quantize random edge jitter. The proposed TRNG design is implemented on Xilinx Virtex-6 XC6VLX240T-1FF1156 FPGA and shows a high quality of randomness which has passed the NIST test suite with relatively high p-values, achieves a high throughput of 127 Mbps with occupying 32 slices. Experimental results show a good tolerance to bias phenomenon induced by process, voltage, and temperature variations.
Keywords:
True random number generator
Vernier technique
field programmable gate array
high throughput
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IEEE Access cover
IEEE Access
IF:
3.6
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9.8W
Citations:
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H
hefei university of technology
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Papers: 1.7W
Citations: 35