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MATLAB-Open Source Tool Based Framework for Test Generation for Digital Circuits Using Evolutionary Algorithms
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DOI：10.1007/s10836-023-06088-1.png)
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Abstract
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This paper proposes an automated framework for test generation for digital circuits, using evolutionary algorithms (EAs) such as Genetic Algorithm (GA) and Particle Swarm Optimization (PSO) targeting single stuck-at faults. The framework is built in MATLAB environment in conjunction with an open-source fault simulator HOPE. Finding the best test pattern with maximum fault coverage from a very large search space of digital tests is proven to be time effective in VLSI circuits using EAs. This work emphasizes upon finding the best test pattern with maximum fault coverage in fewer iterations. This indeed can significantly reduce the number of required test patterns to achieve a good fault coverage quickly. Unlike open source ATPG tool ATALANTA which can generate tests only for combinational circuits, our EA based test generation framework is able to generate test pattern for combinational as well as sequential circuits. The proposed framework has introduced test generation for sequential circuits before and after their “netlist cutting”. In this context, an automated tool which can perform “netlist cutting” for sequential circuits without altering the structure of combinational logic has been devised. The quality of generated test patterns is verified through fault simulation of some of the ISCAS’85 combinational and ISCAS’89 sequential benchmark circuits. The work has also explored the efficacy of the best test pattern through variations of genetic operators like crossover and mutation rate. Results show that the proposed GA and PSO outperforms the commonly known open source ATPG tool ATALANTA.
Keywords:
Evolutionary algorithm
ATPG
Genetic algorithm
Particle swarm optimization
Stuck-at faults
Netlist cutting
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