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Memristor-Based CPU Architecture for In-Memory Computing
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DOI：10.1109/LED.2026.3683728.png)
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Abstract
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To address the “memory wall” bottleneck of conventional von Neumann architectures, this study proposes a memristor-based in-memory computing CPU architecture. Based on non-volatile memristors, logic gates of NOT, AND, NAND, OR, NOR and arithmetic units are realized. Furthermore, with two key innovations of memristors replacing traditional D flip-flops and a CMOS-memristor hybrid address decoder, the memristor-based CPU supports targeted data operations and result storage at arbitrary addresses. The novel memristor-based CPU verifies an 87.7% reduction in average system power consumption over the conventional CMOS design, providing a feasible engineering solution for next-generation low-power in-memory computing applications.
Keywords:
Memristor
implication logic
in-memory computing
CPU architecture
low power
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4.5
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743
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2.3W
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