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Software-Based Self-Test Techniques for Dual-Issue Embedded Processors

delete2020-04-01
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P
Paolo Bernardi
R
Riccardo Cantoro *
S
Sergio De Luca
E
Ernesto Sánchez
A
A. Sansonetti
G
Giovanni Squillero
DOI:10.1109/TETC.2017.2758641delete
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Abstract

Abstract

En 中文
Nowadays, Self-Test strategies for testing embedded processors are increasingly diffused, especially for safety critical systems. Test programs can be effectively used for this purpose. This paper describes a set of systematic self-test techniques for in-order dual-issue embedded processors. The paper shows how to produce test programs suitable for the detection of faults in five classes of sub-modules: duplicated computational modules; multi-port register file; duplicated pipeline registers and feed-forward paths; pipeline interlocking logic; and pre-fetch buffer. While some techniques extend single-issue test programs, new techniques are also shown; results are illustrated for a couple of 32-bit in-order dual-issue processors included in automotive Systems-on-Chip manufactured by STMicroelectronics.
Keywords:
Program processors
Pipelines
Computer architecture
Built-in self-test
Registers
Automotive engineering
Microprocessors testing
software-based self-test
functional safety
software test libraries
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Journal

IEEE Transactions on Emerging Topics in Computing cover
IEEE Transactions on Emerging Topics in Computing
IF:
5.4
Papers:
1.1K
Citations:
3.4K

Organization

P
Polytechnic University of Turin
Scholars:
1.3W
Papers: 1.3W
Citations: 1.3W
S
stmicroelectronics
Scholars:
1.3K
Papers: 785
Citations: 2