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Stack-Size Sensitive On-Chip Memory Backup for Self-Powered Nonvolatile Processors

delete2017-11-01
delete24
PRE
AI
M
Mengying Zhao
傅忱忱 (Chenchen Fu)
Z
Zewei Li
Q
Qingan Li
M
Mimi Xie
Y
Yongpan Liu
J
Jingtong Hu
Z
Zhiping Jia *
C
Chun Jason Xue
DOI:10.1109/TCAD.2017.2666606delete
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Abstract

Abstract

En 中文
Wearable devices gain increasing popularity since they can collect important information for healthcare and wellbeing purposes. Compared with battery, energy harvesting is a better power source for these wearable devices due to many advantages. However, harvested energy is naturally unstable and program execution will be interrupted frequently. Nonvolatile processors demonstrate promising advantages to back up volatile state before the system energy is depleted. However, it also introduces non-negligible energy and area overhead. In this paper, we aim to reduce the amount of data that need to be backed up during a power failure. Based on the observation that stack size varies along program execution, we propose to analyze the application program and identify efficient backup positions, by which the stack content to back up can be significantly reduced. The evaluation results show an average of 45.7% reduction on nonvolatile stack size for stack backup, with 0.58% storage overhead. In the mean time, with the proposed schemes, the energy utilization and program forward progress can be greatly improved compared with instant backup.
Keywords:
Backup
compiler
energy harvesting system
nonvolatile processor (NVP)
stack
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I
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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2.9
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tsinghua university
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City University of Hong Kong
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wuhan university
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