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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
Papers
564
Citations
9605
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526
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Redefining Tradition: An Active Watermarking Approach for IP Protection in SoCs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-05-01
0
PRE
AI
Ibnat, Zahin; Rahman, Mridha Md Mashahedur; Rahman, Sazadur; Zhou, Jingbo; Farahmandi, Farimah
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An Electronically Tunable Dual Flux-Controlled Floating Memristor Emulator
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-05-01
0
PRE
AI
Kumar, Navnit; Pandey, Neeta; Kumar, Manjeet; Kumar, Manish; Minaei, Shahram
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AGON: Automated Design Framework for Customizing Processors From ISA Documents
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-05-01
0
PRE
AI
Li, Chongxiao; Huang, Di; Jin, Pengwei; Ma, Tianyun; Han, Husheng; Cheng, Shuyao; Hao, Yifan; Zhao, Yongwei; Xu, Guanglin; Du, Zidong; Zhang, Rui; Li, Xiaqing; Wen, Yuanbo; Hu, Xing; Guo, Qi
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Efficient Instruction Fusion for ASIPs: A Low-Cost Approach to Structural Hazard Control
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-05-01
0
PRE
AI
Zhou, Xinbing; Liu, Tianlang; Tang, Tiancheng; Man, Yi; Hao, Peng; Chen, Wei; Liu, Dake
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Novel FPGA Technology Mapping for Dual-Output LUTs: Methodology and Application
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-05-01
0
PRE
AI
Shang, Liuting; Lu, Sheng; Jung, Sungyong; Liang, Qilian; Pan, Chenyun
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Event-Based Simulation of Stochastic Memristive Devices for Neuromorphic Computing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
0
PRE
AI
El-Geresy, Waleed; Papavassiliou, Christos; Gunduz, Deniz
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Division-Free Four-Way Toom-Cook Polynomial Multiplication Architecture for Large Integer Arithmetic on FPGAs and ASICs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
0
PRE
AI
Das, Monalisa; Jajodia, Babita
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Efficient FRW Transitions via Stochastic Finite Differences for Handling Non-Stratified Dielectrics
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
0
PRE
AI
Huang, Jiechen; Yu, Wenjian
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Dynamic Binary Translation of VLIW Code With Software Pipeline
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
0
PRE
AI
Liang, Hongliang; Liao, Kailai; Wu, Guohao; Yi, Qiuping
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Approximate Logic Synthesis for Dot-Inverter Graphs Using Node Merging-Enhanced Genetic Algorithm-Based Approach
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
0
PRE
AI
Li, Yi-Ting; Chen, Ihao; Chen, Yung-Chih; Wang, Chun-Yao
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PCMT: Prioritizing Coherence Message Types for NoC Protocol-Level Deadlock Freedom
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
0
PRE
AI
Jia, Yufan; Zhang, Zhiyuan; Fu, Chao; Wan, Li; Han, Jun
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Leveraging Tensor Dataflow for Improved Thermal Performance on 3D-Stacked SRAM Architecture
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
0
PRE
AI
Liu, Pengyu; Chen, Liyan; Yuan, Zelong; Liu, Yingkun; Jiang, Jianfei; Wang, Qin; Mao, Zhigang; Jing, Naifeng
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CXL-DMSim: A Full-System CXL Disaggregated Memory Simulator With Comprehensive Silicon Validation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
1
PRE
AI
Wang, Yanjing; Wu, Lizhou; Hong, Wentao; Ou, Yang; Wang, Zicong; Gao, Sunfeng; Zhang, Jie; Ma, Sheng; Dong, Dezun; Qi, Xingyun; Lai, Mingche; Xiao, Nong
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Chipletizer 2.0: Toward Cost-Effective Chiplet Design via Reuse-Aware Decomposition
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
0
PRE
AI
Li, Fuping; Yuan, Ding; Wang, Yujie; Zhou, Juelei; Liang, Xihao; Han, Yinhe; Li, Huawei; Li, Xiaowei; Wang, Ying
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OpRA: Optimizing Resiliency Assessment for Deep Neural Networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
1
PRE
AI
Bellarmino, Nicolo; Barone, Salvatore; Pappalardo, Salvatore; Bosio, Alberto; Cantoro, Riccardo
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CodeV: Empowering LLMs With HDL Generation Through Multilevel Summarization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
2
PRE
AI
Zhao, Yang; Huang, Di; Li, Chongxiao; Jin, Pengwei; Song, Muxin; Xu, Yinan; Nan, Ziyuan; Gao, Mingju; Ma, Tianyun; Qi, Lei; Pan, Yansong; Zhang, Zhenxing; Zhang, Rui; Zhang, Xishan; Du, Zidong; Guo, Qi; Hu, Xing
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Side-Channel Leakage in Low-Entropy Masking Schemes Attributed to FPGA Architecture
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
0
PRE
AI
Li, Yanbin; Guo, Yikang; Zhang, Fan
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An Efficient Algorithm for Exact SRAM Verification via Novel Pattern-Matching Techniques
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
0
PRE
AI
Wang, Sunkanghong; Qiu, Qingsheng; Zhang, Hao; Wei, Lijun; Liu, Qiang
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APT-LLM: Exploiting Arbitrary-Precision Tensor Core Computing for LLM Acceleration
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
0
PRE
AI
Ma, Shaobo; Fang, Chao; Shao, Haikuo; Wang, Zhongfeng
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DAMIL-DCIM plus : Automated Dataflow-Aware Layout Synthesis for Digital CIM With Self-Assembled Bitcell Units and MILP-Based Optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF
2.9
2026-04-01
0
PRE
AI
Wang, Chuyu; Yan, Xinglong; Xu, Zecheng; Hu, Ke; Zhu, Keren; Li, Shuo; Yang, Fan; Zeng, Xuan
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