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SaveToggle Rate Aware Quantization Model Based on Digital Floating-Point Computing-In-Memory Architecture
Chen, Xi; Zhao, Yitong; Guo, An; Chen, Jinwu; Dong, Fangyuan; Zhang, Zhaoyang; Xiong, Tianzhu; Wang, Bo; Kong, Yuyao; Si, Xin Share Save Share Save Share Save From macro to microarchitecture: reviews and trends of SRAM-based compute-in-memory circuitsZhang, Zhaoyang; Chen, Jinwu; Chen, Xi; Guo, An; Wang, Bo; Xiong, Tianzhu; Kong, Yuyao; Pu, Xingyu; He, Shengnan; Si, Xin; Yang, Jun Share Save 
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